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| 'Correct' Modeline settings for 1280x768 don't work. http://forum.linhes.org/viewtopic.php?f=5&t=10239 |
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| Author: | taylordtv [ Sun May 28, 2006 7:21 am ] |
| Post subject: | 'Correct' Modeline settings for 1280x768 don't work. |
G'day all, I have an LCD panel that I just can't seem to get 1280x768 working via VGA from an EPIA SP13000 with knoppmyth. I have previously had this resolution working from the same board running XP, so I know the panel is good. I generated a suggested modeline(s) from xtiming.pl but I kept getting either (vertical sync too wide) or (horixontal sync too wide) errors. I have used the settings that are reported from the /var/log/XFree86.0.log (via DDC probe I guess) over those that were calculated via xtiming.pl to see if that would fix things - to no avail. Here is the relevant part of the log... Code: (II) VIA(0): Supported additional Video Mode: (II) VIA(0): clock: 80.1 MHz Image Size: 862 x 517 mm (II) VIA(0): h_active: 1280 h_sync: 1344 h_sync_end 1480 h_blank_end 1680 h_border: 0 (II) VIA(0): v_active: 768 v_sync: 769 v_sync_end 788 v_blanking: 795 v_border: 0 (II) VIA(0): Ranges: V min: 56 V max: 85 Hz, H min: 30 H max: 80 kHz, PixClock max 80 MHz (II) VIA(0): Monitor name: DT-3003X .. (II) VIA(0): Not using mode "1280x768" (vertical sync too wide) The relevant parts of XF86Config-4 with the settings gleaned from the log. Code: Section "Monitor" Identifier "Monitor0" Option "DPMS" "true" # These are the AWA panels limits HorizSync 30 - 80 # from X logs DDC probe VertRefresh 56 - 85 # from X logs DDC probe # From http://xtiming.sourceforge.net/cgi-bin/xtiming.pl Modeline "1280x768" 80.13 1280 1344 1480 1680 768 769 788 795 +hsync +vsync # From reading logs and http://www.linux-mag.com/content/view/1672/0/1/2/ # Mode "1280x1024" # DotClock 80.130 # HTimings 1280 1344 1480 1680 # VTimings 768 769 788 795 # EndMode EndSection SubSection "Display" Depth 16 Modes "1280x768" "1024x768" "800x600" "640x480" EndSubSection Interestingly, ddcxinfo-knoppix doesn't report 1280x768 as a valid mode, even thought the panel definitely supports it. Using ddcprobe give numbers that might correlate with the log timings - if I knew how to interpret them From ddcprobe... Code: Detailed timing 1:
Pixel clock: 80130000 Horizontal active time (pixel width): 256 Horizontal blank time (pixel width): 1424 Vertical active time (pixel height): 0 Vertical blank time (pixel height): 795 Horizontal sync offset: 320 Horizontal sync pulse width: 136 Vertical sync offset: 3 Vertical sync pulse width: 1 Dimensions: 606x773 Can anyone shed any light on what is causing the "vertical sync too wide" errors? I suspect it's something simple, but I really can't put my finger on it. |
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| Author: | mjl [ Sun May 28, 2006 7:49 am ] |
| Post subject: | |
Hi Try setting the vert refresh to 60, I have an "economical" lcd and that is the only way it will work. The image pops in once the xserver starts. VertRefresh 60 # from X logs DDC probe Mike |
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| Author: | taylordtv [ Sun May 28, 2006 8:51 pm ] |
| Post subject: | |
mjl wrote: Hi
Try setting the vert refresh to 60, I have an "economical" lcd and that is the only way it will work. The image pops in once the xserver starts. VertRefresh 60 # from X logs DDC probe Mike Ta for the tip, but no dice - still got the same error. However, as usually happens to me once I finally ask a question, a brainwave occurs. I had look for the source of the error in the driver code (/usr/src/openchrome/unichrome/via_mode.c), and lo, this pops out. Code: /* vertical sync end : start + 16 -- other bits someplace? */
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVSyncEnd: 0x%03X\n", mode->CrtcVSyncEnd)); ViaCrtcMask(hwp, 0x11, mode->CrtcVSyncEnd, 0x0F); ... if ((mode->CrtcVSyncEnd - mode->CrtcVSyncStart) > 16) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVSyncEnd out of range.\n"); return MODE_VSYNC_WIDE; } So I made sure that my Vsync_end value in my modeline was not more that 16 greater than the start (changed 788 to 785) and viola, it works. The 'solution' smells of a bit of a hack, but it works which is good enough for me. There is another section (ViaModeSecondaryVGAValid) in via_modes.c that allows Vsync > 16, but that doesn't seem to get called (only one display is active?), so my modeline hack is required. Now on to my sound issues. M |
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| Author: | nigelpearson [ Mon May 29, 2006 5:57 am ] |
| Post subject: | |
This may not help, but these are the modelines that I use on a different VIA powered motherboard: Code: 105c104,105
< VertRefresh 50.0 - 75.0 # Very conservative. May flicker. --- > VertRefresh 50.0 - 100.0 # Added by Nigel > # VertRefresh 50.0 - 75.0 # Very conservative. May flicker. 106a107,121 > # 1280x720 @ 50.00 Hz (GTF) hsync: 37.05 kHz; pclk: 60.47 MHz > Modeline "1280x720" 60.47 1280 1328 1456 1632 720 721 724 741 -HSync +Vsync > # 1280x720 @ 75.00 Hz (GTF) hsync: 56.40 kHz; pclk: 95.65 MHz > Modeline "1280x720" 95.65 1280 1352 1488 1696 720 721 724 752 -HSync +Vsync > # 1280x720 @ 60.00 Hz (GTF) hsync: 44.76 kHz; pclk: 74.48 MHz > Modeline "1280x720" 74.48 1280 1336 1472 1664 720 721 724 746 -HSync +Vsync > # 1280x768 @ 50.00 Hz (GTF) hsync: 39.55 kHz; pclk: 65.18 MHz > Modeline "1280x768" 65.18 1280 1336 1464 1648 768 769 772 791 -HSync +Vsync > # 1280x768 @ 75.00 Hz (GTF) hsync: 60.15 kHz; pclk: 102.98 MHz > Modeline "1280x768" 102.98 1280 1360 1496 1712 768 769 772 802 -HSync +Vsync > # 1280x768 @ 60.00 Hz (GTF) hsync: 47.70 kHz; pclk: 80.14 MHz > Modeline "1280x768" 80.14 1280 1344 1480 1680 768 769 772 795 -HSync +Vsync > > > The 720p modes aren't supported by the VIA drivers, but one of those 768p ones is. |
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